diff -ur orig/kernel-source/arch/arm/plat-omap/cpu-omap.c kernel-source/arch/arm/plat-omap/cpu-omap.c
--- orig/kernel-source/arch/arm/plat-omap/cpu-omap.c	2009-12-17 09:29:39.000000000 +0200
+++ kernel-source/arch/arm/plat-omap/cpu-omap.c	2010-04-04 13:44:01.000000000 +0300
@@ -148,10 +148,12 @@
 							VERY_HI_RATE) / 1000;
 	}
 
-	clk_set_rate(mpu_clk, policy->cpuinfo.max_freq * 1000);
+//	clk_set_rate(mpu_clk, policy->cpuinfo.max_freq * 1000);
+	clk_set_rate(mpu_clk, 600000000);
 
 	policy->min = policy->cpuinfo.min_freq;
-	policy->max = policy->cpuinfo.max_freq;
+	policy->max = policy->cpuinfo.max_freq; 
+	policy->max = 600000;
 	policy->cur = omap_getspeed(0);
 
 	policy->cpuinfo.transition_latency = 300 * 1000;
diff -ur orig/kernel-source/arch/arm/plat-omap/include/mach/omap34xx.h kernel-source/arch/arm/plat-omap/include/mach/omap34xx.h
--- orig/kernel-source/arch/arm/plat-omap/include/mach/omap34xx.h	2009-12-17 09:29:39.000000000 +0200
+++ kernel-source/arch/arm/plat-omap/include/mach/omap34xx.h	2010-04-04 14:49:09.000000000 +0300
@@ -114,7 +114,9 @@
 #define VDD2_OPP3	0x3
 
 #define MIN_VDD1_OPP	VDD1_OPP1
-#define MAX_VDD1_OPP	VDD1_OPP5
+//#define MAX_VDD1_OPP	VDD1_OPP5
+#define MAX_VDD1_OPP	10
+
 #define MIN_VDD2_OPP	VDD2_OPP1
 #define MAX_VDD2_OPP	VDD2_OPP3
 
diff -wbB -ur orig/kernel-source/arch/arm/mach-omap2/omap3-opp.h kernel-source/arch/arm/mach-omap2/omap3-opp.h
--- orig/kernel-source/arch/arm/mach-omap2/omap3-opp.h	2009-12-17 09:29:39.000000000 +0200
+++ kernel-source/arch/arm/mach-omap2/omap3-opp.h	2010-04-04 15:56:16.000000000 +0300
@@ -22,6 +22,7 @@
 #define S166M   166000000
 
 static struct omap_opp omap3_mpu_rate_table[] = {
+#if 0
 	{0, 0, 0},
 	/*OPP1*/
 	{0, VDD1_OPP1, 0x1E},
@@ -32,7 +33,20 @@
 	/*OPP4*/
 	{S550M, VDD1_OPP4, 0x36},
 	/*OPP5*/
-	{S600M, VDD1_OPP5, 0x3C},
+	{S600M, VDD1_OPP5, 0x3c},
+#else
+	{0, 0, 0},
+	{0, VDD1_OPP1, 0x1E},
+	{S125M, VDD1_OPP2, 0x1E},
+	{S250M, VDD1_OPP3, 0x26},
+	{S500M, VDD1_OPP4, 0x30},
+	{S550M, VDD1_OPP5, 0x30},
+	{S600M, 6, 0x30},
+	{720000000, 7, 0x36},
+	{800000000, 8, 0x36},
+	{900000000, 9, 0x36},
+	{1000000000, 10, 0x36},
+#endif
 };
 
 static struct omap_opp omap3_l3_rate_table[] = {
@@ -56,7 +70,7 @@
 	/*OPP4*/
 	{S400M, VDD1_OPP4, 0x36},
 	/*OPP5*/
-	{S430M, VDD1_OPP5, 0x3C},
+	{S500M, VDD1_OPP5, 0x3C},
 };
 
 #endif
diff -wbB -ur orig/kernel-source/arch/arm/mach-omap2/resource34xx.c kernel-source/arch/arm/mach-omap2/resource34xx.c
--- orig/kernel-source/arch/arm/mach-omap2/resource34xx.c	2009-12-17 09:29:39.000000000 +0200
+++ kernel-source/arch/arm/mach-omap2/resource34xx.c	2010-04-04 15:55:37.000000000 +0300
@@ -231,6 +231,29 @@
 }
 #endif
 
+static int fake_opp_to_real(int opp) {
+        switch(opp) {   
+                case 0:
+                        return 0;
+                case 1: 
+                case 2:
+                        return 1;
+                case 3:
+                        return 2;
+                case 4:
+                case 5:
+                case 6:
+                        return 3;
+                case 7:
+                case 8:
+                        return 4;
+                case 9:
+                case 10:
+                        return 5;
+        }
+        return opp;
+};
+
 static int program_opp_freq(int res, int target_level, int current_level)
 {
 	int ret = 0, l3_div;
@@ -239,7 +262,7 @@
 	if (res == PRCM_VDD1) {
 		curr_opp = &curr_vdd1_opp;
 		clk_set_rate(dpll1_clk, mpu_opps[target_level].rate);
-		clk_set_rate(dpll2_clk, dsp_opps[target_level].rate);
+		clk_set_rate(dpll2_clk, dsp_opps[fake_opp_to_real(target_level)].rate);
 #ifndef CONFIG_CPU_FREQ
 		/*Update loops_per_jiffy if processor speed is being changed*/
 		loops_per_jiffy = compute_lpj(loops_per_jiffy,
diff -wbB -ur orig/kernel-source/arch/arm/mach-omap2/smartreflex.c kernel-source/arch/arm/mach-omap2/smartreflex.c
--- orig/kernel-source/arch/arm/mach-omap2/smartreflex.c	2009-12-17 09:29:39.000000000 +0200
+++ kernel-source/arch/arm/mach-omap2/smartreflex.c	2010-04-04 15:03:20.000000000 +0300
@@ -38,6 +38,29 @@
 #include "smartreflex.h"
 #include "prm-regbits-34xx.h"
 
+int fake_opp_to_real(int opp) {
+	switch(opp) {
+		case 0:
+			return 0;
+		case 1:
+		case 2:
+			return 1;
+		case 3:
+			return 2;
+		case 4:
+		case 5:
+		case 6:
+			return 3;
+		case 7:
+		case 8:
+			return 4;
+		case 9:
+		case 10:
+			return 5;
+	}
+	return opp;
+};
+
 /*
  * VP_TRANXDONE_TIMEOUT: maximum microseconds to wait for the VP to
  * indicate that any pending transactions are complete.  [The current
@@ -294,7 +317,7 @@
 			mpu_opps[curr_opp_no].vsel <<
 			OMAP3430_INITVOLTAGE_SHIFT;
 
-		vpconfig |= (curr_opp_no > SR_MAX_LOW_OPP) ?
+		vpconfig |= (fake_opp_to_real(curr_opp_no) > SR_MAX_LOW_OPP) ?
 			PRM_VP1_CONFIG_ERRORGAIN_HIGHOPP :
 			PRM_VP1_CONFIG_ERRORGAIN_LOWOPP;
 
@@ -444,7 +467,7 @@
 		prm_vp1_voltage = prm_read_mod_reg(OMAP3430_GR_MOD,
 						OMAP3_PRM_VP1_VOLTAGE_OFFSET);
 		t2_smps_steps = abs(vsel - prm_vp1_voltage);
-		errorgain = (target_opp_no > SR_MAX_LOW_OPP) ?
+		errorgain = (fake_opp_to_real(target_opp_no) > SR_MAX_LOW_OPP) ?
 			PRM_VP1_CONFIG_ERRORGAIN_HIGHOPP :
 			PRM_VP1_CONFIG_ERRORGAIN_LOWOPP;
 		vp_config_offs = OMAP3_PRM_VP1_CONFIG_OFFSET;
@@ -513,7 +536,7 @@
 	sr->req_opp_no = target_opp_no;
 
 	if (sr->srid == SR1) {
-		switch (target_opp_no) {
+		switch (fake_opp_to_real(target_opp_no)) {
 		case 5:
 			nvalue_reciprocal = sr->opp5_nvalue;
 			break;
@@ -564,7 +587,7 @@
 			(ERRCONFIG_VPBOUNDINTEN | ERRCONFIG_VPBOUNDINTST));
 
 	if (sr->srid == SR1) {
-		errminlimit = (target_opp_no > SR_MAX_LOW_OPP) ?
+		errminlimit = (fake_opp_to_real(target_opp_no) > SR_MAX_LOW_OPP) ?
 			SR1_ERRMINLIMIT_HIGHOPP : SR1_ERRMINLIMIT_LOWOPP;
 
 		/* set/latch init voltage */
@@ -867,7 +890,7 @@
 
 	if (vdd == PRCM_VDD1) {
 		t2_smps_steps = abs(target_vsel - current_vsel);
-		errorgain = (target_opp_no > SR_MAX_LOW_OPP) ?
+		errorgain = (fake_opp_to_real(target_opp_no) > SR_MAX_LOW_OPP) ?
 			PRM_VP1_CONFIG_ERRORGAIN_HIGHOPP :
 			PRM_VP1_CONFIG_ERRORGAIN_LOWOPP;
 
